Process Grand Rounds 2/8/08

 

Good attendance. Good ideas. Do it again next month? Any suggestions for topics? For those who couldn't make it, here's a brief summary (and let me know if I've missed or misconstrued anything).

Topic #1: Proposed process for a biophotonic/microfluidic structure.

Meredith presented her proposed flow for this device. A sampling of the suggestions:

- Scale up the wavelength and use the standard ASML lithography process. The high patterning quality should allow for devices with much smaller area.

- Wafer bonding to avoid issues with lithographic patterning in deep trenches.

- Check the biocompatibility of whatever materials are chosen.

Topic #2: ASML wafer handling errors wrt/wafers processed through epi and epi2.

The ASML has experienced a number of wafer handling errors which appear to be related to the wafers themselves. Retrieving stuck wafers is a delicate operation and must be done only by trained personnel. Binder reviewed the handling mechanism and outlined the following:

- A vacuum wand picks up from the sender cassette at the center of the wafer.

- The wafer is transferred to the prealigner where it is floated and the flat is located.

- Another vacuum wand (the dipod) takes the wafer to the "e" chuck. The dipod picks up the wafer part way in, 90 degrees CW from the flat. The e-chuck makes vacuum through several pins located in the center of the wafer chuck.

Wafers that have been stuck have been found to have:

- General contamination/particles on the backside preventing vacuum.

- Scribe marks or patterning in the center of the wafer backside.

- Excessive wafer curvature, as qualitatively measured by whether the wafer "floats" on the ultratech table.

- If the flat cannot be found, the wafer will be stuck (on the prealigner.)

Stuck wafers make the system unusable, until they are retrieved by trained personnel. Another concern is that even if bowed wafers COULD be loaded, wafer levelling is difficult -- and focus depth variation will lead to poor resolution. It was resolved that the primary objective is to avoid stuck wafers. Secondarily, understanding the criteria for the ASML, both for wafer handling and process resolution, would allow users to design their process flows to make the most of both.

Action items:

- ASML Engineering Team: see if there is a specification limit for wafer curvature for the handler.

- ASML Engineering Team: forward info and dimensions of the wafer handler.

- ASML/Gary S: train Gary on wafer retrieval.

- ASML and SNF: use this info to devise a document describing acceptable incoming wafer "quality" (limit on curvature, backside patterning, etc.) and process limits in exposing bowed wafers.

- ASML: testing of carrier wafers and modified optical leveling procedures to try to accomodate bowed wafers next week.

- Epi and epi2 users: double-check their recipes to ensure slow ramps between temperature changes.

- SNF (i.e., Paul & Mary): Repair or find a functional stress gage. It was suggested to have one next to the ASML.

Back to top | Home | Sitemap/Search
_______________________________________________________________
Stanford Nanofabrication Facility
webmaestro@snf.stanford.edu
Last Modified 02/15/2008